• DocumentCode
    664976
  • Title

    Formal co-verification of local interconnect network master node

  • Author

    Nguyen Duc Minh

  • Author_Institution
    Hanoi Univ. of Sci. & Technol., Hanoi, Vietnam
  • fYear
    2013
  • fDate
    16-18 Oct. 2013
  • Firstpage
    355
  • Lastpage
    359
  • Abstract
    In this paper, we describe a case-study of formal co-verification of a Local Interconnect Network (LIN) master node which is implemented as an embedded system. We use the framework described in [1] to formally co-verify the LIN master node. However, as the proof problem of verifying global behaviors of the LIN master node is complex and exceeds the capacity of a state-of-the-art formal property checker, we apply an abstract technique to reduce the size of the LIN master node implementation. In our abstraction technique, only LIN protocol-related behaviors are kept in the new, simplified LIN master node. After abstraction, we can successfully verify several global properties against the LIN master node.
  • Keywords
    formal verification; system buses; LIN master node; embedded system; formal co-verification; formal property checker; interval property checker; local interconnect network; Abstracts; Concrete; Embedded systems; Hardware; Hardware design languages; Protocols; BMC; Formal Verification; Interval Property Checking; LIN; SAT;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Technologies for Communications (ATC), 2013 International Conference on
  • Conference_Location
    Ho Chi Minh City
  • ISSN
    2162-1020
  • Print_ISBN
    978-1-4799-1086-1
  • Type

    conf

  • DOI
    10.1109/ATC.2013.6698136
  • Filename
    6698136