Hardware implementation of an interference canceller for IDMA wireless communications

Due to the increasing demand for machine-to-machine (M2M) communication, a wireless system which realizes simultaneous communication of small-sized packets for a large number of users is requested. Interleave division multiple access (IDMA) is known to have superior user detection performance in communication with a large number of users. This paper reports the hardware implementation of an interference canceller for IDMA communication systems. The conventional architecture suffers from low utilization efficiency in interleaving/de-interleaving. The proposed architecture improves the utilization efficiency by applying dual frame processing in the interference canceller. The proposed architecture has reduced circuit area and power dissipation by 25% and 41%, respectively.