• DocumentCode
    671584
  • Title

    Fully-digital oscillatory associative memories enabled by non-volatile logic

  • Author

    Calayir, Vehbi ; Pileggi, Larry

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
  • fYear
    2013
  • fDate
    4-9 Aug. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Due to its brain-like parallel processing, neurocomputing has been regarded as intriguing alternative to traditional von Neumann architectures for such applications as image processing, pattern recognition, and associative memory. Associative memories based on neurocomputing attempt to mimic the human brain via a parallel network of coupled artificial neurons. Oscillatory neural networks (ONNs) have been proposed for such purposes; however, CMOS-based implementations would be inefficient due to the corresponding circuit complexity of oscillators and phase-locking mechanisms. In addition, programmability of the synaptic weights would require numerous reconfigurable, complex analog circuits that represent an impractical power and area overhead. In this paper we propose a fully-digital ONN architecture that is enabled by non-volatile logic. Using a newly proposed all-magnetic logic family, mLogic, we demonstrate the efficacy of digitizing the oscillators and phase relationships by exploiting the inherent storage. We perform a device-level simulation-based comparison of mLogic and 32nm CMOS for a fully-interconnected 60-neuron system, and show approximately 15× area improvement and 18× power improvement that would be achieved for a large system with 100k neurons.
  • Keywords
    CMOS memory circuits; circuit oscillations; circuit simulation; content-addressable storage; memory architecture; neural chips; CMOS; all-magnetic logic family; brain-like parallel processing; coupled artificial neurons; device-level simulation-based comparison; fully-digital ONN architecture; fully-digital oscillatory associative memories; fully-interconnected neuron system; human brain; mLogic; neurocomputing; nonvolatile logic; oscillatory neural networks; parallel network; power improvement; size 32 nm; Associative memory; CMOS integrated circuits; Computer architecture; Logic gates; Neurons; Oscillators; Resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks (IJCNN), The 2013 International Joint Conference on
  • Conference_Location
    Dallas, TX
  • ISSN
    2161-4393
  • Print_ISBN
    978-1-4673-6128-6
  • Type

    conf

  • DOI
    10.1109/IJCNN.2013.6706925
  • Filename
    6706925