Soft error interception latch: double node charge sharing SEU tolerant design

As technology scales down, soft errors, because of single event upsets (SEUs) that affect multiple nodes (through multiple node charge sharing), become a serious concern in nanometre technology integrated circuits. Existing radiation hardening techniques provide partial or no immunity when more than one node are affected. A new latch topology is presented that guarantees soft error tolerance when a single node or any arbitrary combination of node pairs is affected by an SEU. The proposed scheme exploits a positive feedback loop which consists of C-elements. Simulation results validate the efficiency of the new design over existing soft error hardening techniques such as BISER, FERST and TPDICE.