SEU reliability evaluation of 3D ICs

Author

Huiyun Li ; Xiaobo Hu ; Cuiping Shao ; Jianbin Zhou ; Guoqing Xu

Author_Institution

Shenzhen Inst. of Adv. Technol., Chinese Univ. of Hong Kong, Shenzhen, China

Volume

51

Issue

4

fYear

2015

fDate

2 19 2015

Firstpage

362

Lastpage

364

Abstract

The single-event-upset (SEU) reliability is a concern for three-dimensional (3D) integrated circuits (ICs), mainly due to the carrier mobility change caused by thermo-mechanical stress from through-silicon vias (TSVs) and the shallow trench isolation (STI). A systematic evaluation method is proposed to identify the vulnerability within 3D ICs at design time. The evaluation flow involves the TSV/STI stress-aware mobility variation calculation, sensitive region marking, insertion of excitation signals and then the simulation of the 3D ICs. This method is able to help 3D IC designers to evaluate and enhance the SEU reliability at design time.

Keywords

carrier mobility; integrated circuit reliability; radiation hardening (electronics); three-dimensional integrated circuits; 3D IC; SEU reliability evaluation; STI; TSV; carrier mobility; design time; evaluation flow; excitation signals; sensitive region marking; shallow trench isolation; single-event-upset; stress-aware mobility variation calculation; systematic evaluation method; thermomechanical stress; three-dimensional integrated circuits; through-silicon vias;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el.2014.3968

Filename

7042440