Title :
84 Gbit/s SiGe BiCMOS duobinary serial data link including Serialiser/Deserialiser (SERDES) and 5-tap FFE
Author :
De Keulenaer, T. ; Torfs, G. ; Ban, Y. ; Pierco, R. ; Vaernewyck, R. ; Vyncke, A. ; Li, Z. ; Sinsky, J.H. ; Kozicki, B. ; Yin, X. ; Bauwelinck, J.
Author_Institution :
Dept. of INTEC, Ghent Univ. - IMEC - iMinds, Ghent, Belgium
Abstract :
The increasing demand for bandwidth fuels the development towards high data rate electrical serial links. These links generally suffer from considerable frequency-dependent loss, introducing the need for equalisation at 10 Gbit/s and higher. Modulation schemes with improved spectral efficiency, with respect to non-retrun to zero (NRZ), combined with feed-forward equalisation (FFE), allow increasing the chip-to-chip data rate with the drawback of a more complex, e.g. multi-level, receiver (Rx). The use of duobinary modulation (DB) is presented to realise a high-speed serial link. The increase in complexity of a DB Rx is limited, whereas the required channel bandwidth compared with NRZ is reduced. Furthermore, the need for equalisation when compared with PAM4 is reduced as the required roll-off that is needed to create a duobinary modulated signal from an NRZ stream can incorporate the frequency-dependent loss of the link.
Keywords :
BiCMOS integrated circuits; 5-tap FFE; 84 Gbit/s SiGe BiCMOS duobinary serial data link; DB; FFE; SERDES; bandwidth fuels; channel bandwidth; chip-to-chip data rate; duobinary modulated signal; duobinary modulation; electrical serial links; feed forward equalisation; frequency dependent loss; modulation schemes; serial link; spectral efficiency;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2014.3817