• DocumentCode
    675594
  • Title

    Demonstration of gate-all-around FETs based on suspended CVD-grown silicon nanowires

  • Author

    Jin Yong Oh ; Seung-Min Lee ; Jong-Tae Park ; Triplett, Mark ; Dong Yu ; Islam, Md Shariful

  • Author_Institution
    Electr. & Comput. Eng., Univ. of California Davis, Davis, CA, USA
  • fYear
    2013
  • fDate
    7-10 Oct. 2013
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    For the first time, herein we demonstrate gate-all-around field-effect-transistors having a horizontally suspended nanowire channel. The suspended nanowires were grown using the vapor-liquid-solid technique. The gate-all-around field-effect-transistor exhibited a p-type accumulation mode with desirable performance. To study properties of the connection between the nanowire channels and electrodes, measurements of surface photocurrent and temperature dependent current-voltage between source and drain electrodes were carried out. The results including an energy band diagram are discussed in this paper.
  • Keywords
    chemical vapour deposition; electrodes; elemental semiconductors; field effect transistors; nanowires; photoconductivity; photoemission; semiconductor growth; silicon; Si; drain electrode; energy band diagram; gate-all-around FET; gate-all-around field-effect-transistor; horizontally suspended nanowire channel; p-type accumulation mode; source electrode; surface photocurrent measurement; suspended CVD-grown silicon nanowire; temperature dependent current-voltage; vapor-liquid-solid technique; Educational institutions; Electrodes; Fabrication; Field effect transistors; Logic gates; Nanowires; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
  • Conference_Location
    Monterey, CA
  • Type

    conf

  • DOI
    10.1109/S3S.2013.6716567
  • Filename
    6716567