DocumentCode
675598
Title
Germanium on insulator (GOI) structure locally grown on silicon using hetero epitaxial lateral overgrowth
Author
Nam, J.H. ; Jung, W.S. ; Shim, Jong-In ; Ito, Takao ; Nishi, Yoshio ; Park, Je-Ho ; Saraswat, Krishna C.
Author_Institution
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
fYear
2013
fDate
7-10 Oct. 2013
Firstpage
1
Lastpage
2
Abstract
A CMOS compatible technique for fabricating germanium (Ge) on insulator (GOI) structure that is locally implemented on silicon (Si) substrate is demonstrated. On a (100) crystalline Si substrate, silicon dioxide (SiO2) is thermally grown. Then growth window for Ge is defined by locally etching down the SiO2 to reveal the Si surface. Ge is grown epitaxially with multiple steps of high temperature hydrogen (H2) annealing. After growing Ge crystals fill the growth window, the growth proceeds laterally and, finally coalesces with the neighbouring Ge growth window. Thus crystalline Ge sitting on SiO2 is achieved. Chemical mechanical polishing (CMP) is used to planarize the surface, and wet etching is done to control the GOI film thickness.
Keywords
annealing; chemical mechanical polishing; epitaxial growth; etching; silicon compounds; CMOS compatible technique; CMP; GOI film thickness; SiO2; chemical mechanical polishing; crystalline substrate; germanium on insulator structure; growth window; hetero epitaxial lateral overgrowth; high temperature hydrogen annealing; wet etching; Crystals; Epitaxial growth; Rough surfaces; Silicon; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
Conference_Location
Monterey, CA
Type
conf
DOI
10.1109/S3S.2013.6716571
Filename
6716571
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