FPGA implementation of an efficient cascaded integrator comb filter for narrow and wideband designs

Cascaded integrator-comb (CIC) digital filters are computationally efficient implementations of low pass filters. A characteristic that makes them popular in hardware devices is that they require no multiplication. For an ideal low pass filter, the passband part of the signal spectrum is multiplied by one and the stopband part of the signal by zero. The CIC filter has a poor magnitude response, that is, a high passband droop and a low attenuation in the folding bands. Thus the implementation of CIC filters should aim to provide better attenuation in the stopbands and reduced droop in the passbands. CIC filters are typically either followed or preceded by higher performance linear-phase low pass tapped delay- line FIR filters whose tasks are to compensate for the CIC filter´s non-flat passband. This paper introduces a design and implementation of cascaded integrator comb with maximally flat passband using second order linear phase filter for narrowband compensation and fourth order linear phase filter for wideband compensation without using a separate compensator. Closed-form equations for the computation of the filter coefficients are provided. Here response sharpening with a Chebyshev polynomial is carried out to get an equiripple stopband. Computational complexity is reduced with the use of low-speed additions, and multiplications by small integer coefficients are converted to shift operations with powers of two. The many small stopbands of CIC are replaced with one large one. The optimized design uses a single Saramaki Ritoniemi structure to provide passband flatness and stopband sharpening simultaneously, making it suitable for FPGA implementation. Thus it can be effective in 1D receiver antenna array designs to create pencil beams.