98 mW 10 Gbps Wireless Transceiver Chipset With D-Band CMOS Circuits

Author

Fujishima, Minoru ; Motoyoshi, Mizuki ; Katayama, Kengo ; Takano, Kyoya ; Ono, Nobutaka ; Fujimoto, Richard

Author_Institution

Grad. Sch. of Adv. Sci. of Matter, Hiroshima Univ., Higashi-hiroshima, Japan

Volume

48

Issue

10

fYear

2013

fDate

Oct. 2013

Firstpage

2273

Lastpage

2284

Abstract

Recently, short-distance high-speed wireless communication using a 60 GHz band has been studied for mobile application. To realize higher-speed wireless communication while maintaining low power consumption for mobile application D band (110-170 GHz) is promising since it can potentially provide a wider frequency band. Thus, we have studied D-band CMOS circuits to realize low-power ultrahigh-speed wireless communication. In the D band, however, since no sufficient device model is provided, research generally has to start from device modeling. In this paper, a design procedure for D-band CMOS circuits is overviewed from the device layer to the system layer, where the architecture is optimized to realize both low power and high data transfer rate. Finally, a 10 Gbps wireless transceiver with a power consumption of 98 mW is demonstrated using the 135 GHz band.

Keywords

CMOS integrated circuits; radio transceivers; D-band CMOS circuits; bit rate 10 Gbit/s; frequency 110 GHz to 170 GHz; frequency 60 GHz; high data transfer rate; higher-speed wireless communication; low power consumption; low-power ultrahigh-speed wireless communication; mobile application D band; power 98 mW; wireless transceiver chipset; CMOS integrated circuits; Delays; Integrated circuit modeling; Semiconductor device measurement; Semiconductor device modeling; Transmission line measurements; Wireless communication; CMOS; device model; millimeter wave; transceiver;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2013.2261192

Filename

6517512