An Area-Efficient Clamp Based on Transmission Gate Feedback Technology for Power Rail Electrostatic Discharge Protection

Author

Xiaowu Cai ; Beiping Yan ; Xiao Huo

Author_Institution

Hong Kong Appl. Sci. & Technol. Inst., Hong Kong, China

Volume

36

Issue

7

fYear

2015

fDate

Jul-15

Firstpage

639

Lastpage

641

Abstract

An area-efficient clamp based on transmission gate feedback technology is presented for power rail electrostatic discharge (ESD) protection. With this novel design, only a time constant of 10 ns is required for triggering and keeping the clamp turn-on during an ESD event. Full chip ESD protection with this design can endure a human body model pulse of 4500 V. Compared with the conventional clamp with the same area, the proposed clamp has 28% improvement in ESD protection capability. Simulation results show that there is no mistriggering problem caused by power-on pulse and power noise.

Keywords

CMOS integrated circuits; electrostatic discharge; integrated circuit design; ESD protection capability; area-efficient clamp; clamp turn-on; full chip ESD protection; human body model pulse; mistriggering problem; power noise; power rail electrostatic discharge protection; power-on pulse; time 10 ns; transmission gate feedback technology; voltage 4500 V; CMOS integrated circuits; Clamps; Electrostatic discharges; Logic gates; Noise; Rails; Threshold voltage; Electrostatic Discharge; Electrostatic discharge; RC time constant; TLP testing; area-efficient clamp; transmission gate;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2015.2434835

Filename

7109854