A 2D 4×4 channel readout ASIC for pixelated CdTe detectors for medical imaging applications

Based on the VIP-PIX architecture [1], the results of an integrated time to digital converter (TDC), a temperature sensor, and a 4 × 4 pixels readout integrated circuit (ROIC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors are presented. The developed circuits are the proof of concept of the 10×10 pixels array readout ASIC for positron-emission tomography (PET) scanners and Compton gamma cameras for the VIP pathfinder project [2]. Each individual pixel integrates a complete analog front-end, an analog to digital converter (ADC), configuration registers and a digital controller. For every event, it provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. Parameters such as the gain of the front-end, the fine tuning of the discriminator threshold, or the reset time are fully programmable externally and stored in a shadow register for higher robustness. The TDC, the temperature sensor, and the 16-pixel readout ICs have been fabricated with TSMC 0.25 μm mixed-signal CMOS technology. The TDC shows a sensitivity of 95.5 ps per ADC count and a resolution of 600 ps at full width half maximum (FWHM). The temperature sensor provides a sensitivity of 0.4 Celsius degrees per ADC count. At normal operation, the total power consumption of every pixel is 200 μW. At maximum gain and negative polarity conditions, an equivalent noise charge (ENC) of 152 e^- RMS has been measured at room temperature. These results allow the integration of the fabricated circuits into the final 10 × 10 pixel matrix VIP-PIX ASIC.