A Novel Compact High-Voltage LDMOS Transistor Model for Circuit Simulation

A novel compact lateral double-diffused MOSFET (LDMOS) transistor model is presented in this paper. In contrast to other LDMOS models, the drift region part of this model is developed according to a surface-potential-based description of the drift region underneath the gate oxide. The model gives a complete description for all operation regimes while keeping a relatively simplified analytical expression of the current. A nodal charge model is also included for the time-dependent behavior of devices. The proposed complete LDMOS model is validated by comparison with numerical device simulations and measured data of the actual LDMOS devices. The comparison results demonstrate that the new model gives accurate descriptions for both dc and ac characteristics of LDMOS transistors.