Scalable approach for flash storage controller design

Recently the PCIe interface technology is being widely adopted to bridge a host system and a storage device. The bandwidth scalability provided by this technology allows to satisfy various performance requirements on storage systems. However, a storage system tends to be administrated by a single controller whose technical specification is determined at design time, and therefore we need to design a new controller if the storage system needs to be expanded in performance and capacity. In this paper, we present a scalable channel slice approach for designing a flash storage controller. In this approach, a storage system is composed of channel slice modules each of which has a channel slice controller and flash memory devices. The proposed channel slice controller is designed by using the Verilog hardware description language, and its functionality and performance have been verified using simulation techniques.