A wide operation frequency range frequency clock generator with phase interpolator

Author

Wei-Bin Yang ; Horng-Yuan Shih ; Han-Hsien Wang ; Chi-Hsiung Wang ; Sheng-Shih Yeh ; Yu-Lung Lo

Author_Institution

Dept. of Electr. Eng., Tamkang Univ., Taipei, Taiwan

fYear

2013

fDate

17-19 Nov. 2013

Firstpage

360

Lastpage

363

Abstract

This paper presents a wide operation frequency range frequency clock generator that is composed of the phase interpolator. The test chip was fabricated in a 0.18μm CMOS process with a 1.8 V supply voltage. The simulation phase noise and power dissipation are -87.28 dBc/Hz at 1 MHz offset frequency from 88.8 MHz and 1.32 mW, -77.47 dBc/Hz and 2.06 mW from 797.8 MHz, respectively. The duty cycle error rate of the output clock frequency is less than 1.5%.

Keywords

CMOS integrated circuits; frequency synthesizers; timing circuits; voltage-controlled oscillators; duty cycle error rate; frequency 1 MHz; frequency 797.8 MHz; frequency 88.8 MHz; phase interpolator; power 1.32 mW; power 2.06 mW; power dissipation; simulation phase noise; size 0.18 mum; test chip; voltage 1.8 V; wide operation frequency range frequency clock generator; Clocks; Delays; Generators; Time-frequency analysis; Voltage-controlled oscillators; delay-time-adjustment; duty cycle; multiple frequency; phase interpolator; voltage-controlled oscillator;

fLanguage

English

Publisher

ieee

Conference_Titel

SoC Design Conference (ISOCC), 2013 International

Conference_Location

Busan

Type

conf

DOI

10.1109/ISOCC.2013.6864050

Filename

6864050