Research on pipeline-based dynamic binary translation

Traditional dynamic binary translation systems use a single-thread translation and execution scheme, which spend a lot of time in translation stage, making the effective execution stage a small portion of total program run time. While modern CPU design methodology usually employs a technique called pipeline, which makes instruction fetching, decoding and execution overlapped, allowing simultaneous execution of multiple instructions. This paper presents a strategy which improves the performance of an emulated target CPU on a multi-core host by dispatching the translation and execution process into different host threads. The whole process likes the pipeline technology adopted by modern CPUs.