DocumentCode
694769
Title
The Speedup Model for Manycore Processor
Author
Nan Ye ; Ziyu Hao ; Xianghui Xie
Author_Institution
State Key Lab. of Math. Eng. & Adv. Comput., Wuxi, China
fYear
2013
fDate
7-8 Dec. 2013
Firstpage
469
Lastpage
474
Abstract
Integrating a large number of simple cores on the chip to provide the desired performance and throughput, microprocessor has entered the many core era. In order to fully extract the ability of the many core processor, we propose speedup models for many core architecture in this paper. Under the assumption of Hill-Marty model, we deduce our formulas based on Gustafson´s Law and Sun-Ni´s Law. Then, compared with the Hill-Marty model, we theoretically analyze the best allocation under the given resources. Furthermore, we apply the conclusions of our models to evaluate current many core processors and predict concrete future architecture. Our results show that the many core architecture is capable of extensive scalability and being beneficial to promote the performance, especially heterogeneous one. By using simple analytical models, we provide a better understanding of architecture design and our work complement existing studies.
Keywords
multiprocessing systems; Hill-Marty model; architecture design; manycore architecture; manycore processor speedup model; Analytical models; Complexity theory; Computational modeling; Computer architecture; Parallel processing; Predictive models; Resource management; gustafsons law; manycore architecure; speedup model; sun-nis law;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Science and Cloud Computing Companion (ISCC-C), 2013 International Conference on
Conference_Location
Guangzhou
Type
conf
DOI
10.1109/ISCC-C.2013.146
Filename
6973637
Link To Document