• DocumentCode
    695295
  • Title

    Reverse BDD-based synthesis for splitter-free optical circuits

  • Author

    Wille, Robert ; Keszocze, Oliver ; Hopfmuller, Clemens ; Drechsler, Rolf

  • Author_Institution
    Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
  • fYear
    2015
  • fDate
    19-22 Jan. 2015
  • Firstpage
    172
  • Lastpage
    177
  • Abstract
    With the advancements in silicon photonics, optical devices have found applications e.g. for ultra-high speed and low-power interconnects as well as functional computations to be realized on-chip. Caused by the increasing complexity of the underlying functionality, also the need for computer-aided design methods for this technology rises. Motivated by that, initial work on the development of synthesis methods for optical circuits has been performed. But all approaches proposed thus far suffer e.g. from unsatisfactory synthesis results or restricted scalability. In particular, splittings in the resulting circuits which degrade the optical signals into hardly measurable fractions prevent an efficient and scalable synthesis for optical circuits. In this work, we present a synthesis approach based on Binary Decision Diagrams (BDDs) that overcomes these obstacles. The approach yields circuits that rely on a total of zero splitters - at the expense of a moderate increase in the number of optical gates. Experiments confirm that, by this, an efficient and scalable synthesis scheme for optical circuits eventually becomes available.
  • Keywords
    CAD; binary decision diagrams; elemental semiconductors; integrated optics; optical engineering computing; optical fabrication; optical logic; silicon; Si; binary decision diagrams; computer-aided design; low-power interconnects; optical devices; optical gates; reverse BDD-based synthesis; silicon photonics; splitter-free optical circuits; ultra-high speed interconnects; Boolean functions; Data structures; Logic gates; Optical devices; Optical interconnections; Optical network units; Optical receivers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific
  • Conference_Location
    Chiba
  • Print_ISBN
    978-1-4799-7790-1
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2015.7059000
  • Filename
    7059000