Error analysis of ultra-wideband hybrid analogue-to-digital conversion

Author

Kopmann, Heiko ; Gockler, Heinz G.

Author_Institution

Digital Signal Process. Group, Ruhr-Univ. Bochum, Bochum, Germany

fYear

2004

fDate

6-10 Sept. 2004

Firstpage

1091

Lastpage

1094

Abstract

The error analysis of ultra-wideband hybrid analogue-to-digital conversion (H-ADC), which combines time-interleaved ADC (TI-ADC) and multiple concurrent ADC (MC-ADC), is presented. To this end, an error model is introduced comprising quantisation, overflow saturation, DC-offset, gain error, time delay, and time jitter due to sample-and-hold (S&H) circuits and clock generator. The impact of the system parameters on H-ADC performance is investigated by analytic evaluation of the error model assuming an arbitrary FDM input spectrum. The versatility of the H-ADC approach is demonstrated by a challenging future application of satellite on-board processing [1]: 1GHz overall FDM bandwidth with 12MHz channel spacing.

Keywords

analogue-digital conversion; artificial satellites; delays; error analysis; frequency division multiplexing; jitter; quantisation (signal); sample and hold circuits; ultra wideband communication; DC offset; H-ADC approach; MC-ADC; S&H circuits; TI-ADC; analytic evaluation; arbitrary FDM input spectrum; bandwidth 1 GHz; clock generator; error model; gain error; multiple concurrent ADC; overflow saturation; quantisation; sample-and-hold circuits; satellite on-board processing; time delay; time interleaved ADC; time jitter; ultrawideband hybrid analogue-to-digital conversion; Abstracts; Error analysis; Jitter; Noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Conference, 2004 12th European

Conference_Location

Vienna

Print_ISBN

978-320-0001-65-7

Type

conf

Filename

7079766