DocumentCode :
70110
Title :
Performance-Energy Optimizations for Shared Vector Accelerators in Multicores
Author :
Beldianu, Spiridon F. ; Ziavras, Sotirios G.
Author_Institution :
Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ, USA
Volume :
64
Issue :
3
fYear :
2015
fDate :
Mar-15
Firstpage :
805
Lastpage :
817
Abstract :
For multicore processors with a private vector coprocessor (VP) per core, VP resources may not be highly utilized due to limited data-level parallelism (DLP) in applications. Also, under low VP utilization static power dominates the total energy consumption. We enhance here our previously proposed VP sharing framework for multicores in order to increase VP utilization while reducing the static energy. We describe two power-gating (PG) techniques to dynamically control the VP´s width based on utilization figures. Floating-point results on an FPGA prototype show that the PG techniques reduce the energy needs by 30-35 percent with negligible performance reduction as compared to a multicore with the same amount of hardware resources where, however, each core is attached to a private VP.
Keywords :
circuit optimisation; coprocessors; multiprocessing systems; power aware computing; DLP; FPGA prototype; PG techniques; VP per core; VP resources; VP sharing framework; data-level parallelism; energy consumption; floating-point; low VP utilization static power; multicore processors; performance-energy optimizations; power-gating techniques; private vector coprocessor; shared vector accelerators; static energy; Coprocessors; Field programmable gate arrays; Graphics processing units; Multicore processing; Transistors; Vectors; Accelerator; energy; multicore processing; performance; vector processor;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2013.2295820
Filename :
6718035
Link To Document :
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