A VLSI architecture for real time object detection on high resolution images

This paper describes a VLSI-based SIMD multiprocessor system for the implementation of a set of basic object detection algorithms. The system architecture takes advantage of modern fast EDRAM-technology to support the communication requirements of 800 Mbytes/s between main memory and processors imposed by high resolution images. A specialized processing element (PE) architecture for implementation in VLSI which efficiently implements the basic set of algorithms is presented. The performance of a single PE is discussed with respect to the different algorithms. A system consisting of Ą processing elements realized in 0.6μ CMOS-technology is able to localize a 128×128 pixel template in a 1024×1024 pixel image at a rate of 10 frames/second (sustained performance 2.1 · 10⁹ Ops/s).