A comparison of synthesis tools for supervisory controllers

This paper presents a numeric performance comparison of synthesis tools for supervisory controllers. First, a BDD implementation of supervisory synthesis operations is presented. This implementation is based on a predicate representation of SCT previously proved to be successful on establishing a symbolic calculation framework. The implementation is compared with UKDES and Supremica, two tools for supervisory control synthesis using explicit algorithms. Benchmark problems are established for asynchronous product, synchronous product and supremal controllable language calculations. Results of numerical experiments are presented showing a better performance of the symbolic implementation. However, for solving industrial applications it is still needed to improve the computational performance as well as using other design approaches (e.g. modularity and hierarchy).