Efficient hardware architectures of selected MPEG-7 color descriptors

This paper presents hardware implementation of most commonly used MPEG-7 color descriptors. The testing circuits was described using VHDL language and synthesized into FPGA. The proposed system architectures are used for description in real-time image´s color basing on features such as: distribution, spatial layout and spatial structure of color. The proposed hardware architectures split the computational burden into several processes where calculations of mentioned image´s features are made simultaneously in order to improve system´s speed. These methods make hardware realizations of main computational-consumingmodules of the system more time efficient. The RC1000 board with a Xilinx Virtex V1000 FPGA was chosen as the target platform.