DocumentCode
70779
Title
Gate-recessed integrated E/D GaN HEMT technology with fT/fmax >300 GHz
Author
Schuette, M.L. ; Ketterson, Andrew ; Bo Song ; Beam, Edward ; Tso-Min Chou ; Pilla, Manyam ; Hua-Quen Tserng ; Xiang Gao ; Shiping Guo ; Fay, P.J. ; Xing, Huili Grace ; Saunier, Paul
Author_Institution
TriQuint Semicond., Inc., Richardson, TX, USA
Volume
34
Issue
6
fYear
2013
fDate
Jun-13
Firstpage
741
Lastpage
743
Abstract
We report 1000-transistor-level monolithic circuit integration of sub-30-nm gate-recessed E/D GaN high-electron-mobility transistors with fT and fmax above 300 GHz. Simultaneous fT/fmax of 348/340 and 302/301 GHz for E- and D-mode devices, respectively, was measured, representing a 58% increase in fT compared with our previous report, due to improved management of RC parasitic delay. Three-terminal E- and D-mode breakdown voltage of 10.7 and 11.8 V, respectively, is limited by gate-drain breakdown.
Keywords
III-V semiconductors; delay circuits; electric breakdown; gallium compounds; high electron mobility transistors; integrated circuit measurement; monolithic integrated circuits; submillimetre wave transistors; wide band gap semiconductors; 1000-transistor-level monolithic circuit integration; GaN; RC parasitic delay management; frequency 301 GHz; frequency 302 GHz; frequency 340 GHz; frequency 348 GHz; gate-drain breakdown; gate-recessed integrated E-D HEMT technology; size 30 nm; three-terminal E-D-mode breakdown voltage; voltage 10.7 V; voltage 11.8 V; Cutoff frequency; InAlN; enhancement mode; high-electronmobility transistor (HEMT); monolithic integration;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2257657
Filename
6517963
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