DocumentCode
707967
Title
A method of one-pass seed generation for LFSR-based deterministic/pseudo-random testing of static faults
Author
Moriyasu, Takanori ; Ohtake, Satoshi
Author_Institution
Grad. Sch. of Eng., Oita Univ., Oita, Japan
fYear
2015
fDate
25-27 March 2015
Firstpage
1
Lastpage
6
Abstract
This paper proposes a method of LFSR seed generation for deterministic and pseudo-random testing of static faults. The proposed method directly generate seeds by using ATPG and avoids unsuccessful encoding of conventional two-pass generation methods. The effectiveness of the proposed method is evaluated through experiments for several LFSRbased pseudo-random pattern generators. The quality of seeds generated by the proposed method is evaluated by stuck-at fault coverage when test patterns are expanded from seeds.
Keywords
automatic test pattern generation; electrical faults; integrated circuit testing; shift registers; ATPG; LFSR-based deterministic pseudorandom testing; LFSR-based pseudorandom pattern generators; linear feedback shift register; one-pass seed generation; static faults; Automatic test pattern generation; Built-in self-test; Circuit faults; Encoding; Integrated circuit modeling; Logic gates; Phase shifters; LFSR seed generation; constrained ATPG; deterministic test; phase shifter; pseudo-random test; scan-based BIST;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (LATS), 2015 16th Latin-American
Conference_Location
Puerto Vallarta
Type
conf
DOI
10.1109/LATW.2015.7102512
Filename
7102512
Link To Document