ITER VS converter control for circulation current and commutation failure

In this paper, analysis and experiment of ITER VS converters control are investigated. ITER VS converter supplies voltage (±1000V) and current (±25kA) to the superconducting magnets for plasma current vertical stabilization and 4-quadrant operation must be achieved without zero-current discontinuous section. To remove zero-current discontinuous section, circulation current control is required, but it is hard to analyze and design because of characteristic of thyristor nonlinearity. In this paper, delay time of thyristor and processor is implemented using a zero-order holder and equivalent model is analyzed. Circulation current control gains are derived to satisfy the phase margin of 60°. In addition, gamma control is designed to restrict the firing angle to prevent the commutation failure. Commutation failure is prevented by the proposed gamma control even though short circuit or sag occur in grid. To verify a feasibility of the proposed control algorithm, real controller is assembled and power system including the VS converter is implemented in the RTDS (Real Time Digital Simulator) for the hardware-in-loop (HIL) facility. By using the proposed control method, experimental results are well matched to the analysis.