Monitoring test structure for plasma process induced charging damage using charge-based capacitance measurement (PID-CBCM)

Author

Mori, Shigetaka ; Ogawa, Kazuhisa ; Oishi, Hidetoshi ; Suzuki, Tsuyoshi ; Tomita, Manabu ; Bairo, Masaaki ; Fukuzaki, Yuzo ; Ohnuma, Hidetoshi

Author_Institution

Sony Corp., Atsugi, Japan

fYear

2015

fDate

23-26 March 2015

Firstpage

132

Lastpage

137

Abstract

We propose monitoring test structure and measurement technique for plasma process induced charging damage (PID) using charge-based capacitance measurement (CBCM). For evaluating the influence of PID on MOSFET effectively, remarkably small (several tens of fF) gate capacitance of MOSFET can be extracted by eliminating parasitic antenna capacitance. Moreover, we can extract interface trap density from the same CBCM structure using the modified Charge-Pumping measurement.

Keywords

MOSFET; capacitance measurement; charge measurement; semiconductor device measurement; semiconductor device testing; MOSFET; PID-CBCM; charge-based capacitance measurement; gate capacitance; interface trap density extraction; modified charge-pumping measurement; parasitic antenna capacitance; plasma process induced charging damage; test structure monitoring; Antenna measurements; Antennas; Charge pumps; Facsimile; ISO standards; MOS devices; Thickness measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2015 International Conference on

Conference_Location

Tempe, AZ

ISSN

1071-9032

Print_ISBN

978-1-4799-8302-5

Type

conf

DOI

10.1109/ICMTS.2015.7106123

Filename

7106123