DocumentCode
709031
Title
A comparison of relative shielding provided by stitching vias and edge plating
Author
Chiappe, Jim
Author_Institution
Juniper Networks, Sunnyvale, CA, USA
fYear
2015
fDate
15-21 March 2015
Firstpage
101
Lastpage
106
Abstract
Adding stitching vias around the perimeter of a printed circuit board (PCB) is a commonly used technique to reduce electromagnetic interference (EMI) from PCB structures. As system operating frequencies increase along with higher density and higher power utilization, there is a tendency to reduce the spacing between stitching vias in order to provide more shielding at the edge of the PCB. Plating the edge of a PCB provides continuous shielding with one exception. This exception is in the vicinity of the break-off tabs located around the edge of the PCB. In this area, a gap is required in the plating to accommodate this tab. Localized stitching vias may be incorporated adjacent to this gap. This paper compares the relative shielding provided by PCB stitching vias and PCB edge plating up to 40 GHz.
Keywords
electromagnetic interference; electromagnetic shielding; printed circuit layout; EMI; PCB edge plating; PCB stitching vias; PCB structure; electromagnetic interference; power utilization; printed circuit board; relative shielding; Dielectric losses; Electromagnetic interference; Electromagnetic waveguides; Noise; Solid modeling; EMI; PCB; edge plating; layout; stitching;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility and Signal Integrity, 2015 IEEE Symposium on
Conference_Location
Santa Clara, CA
Print_ISBN
978-1-4799-1992-5
Type
conf
DOI
10.1109/EMCSI.2015.7107667
Filename
7107667
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