Title :
A low-noise high-efficient buck converter with noise-shaping technique
Author :
Jiann-Jong Chen ; Ping-Hua Wu ; Ta-Wei Chao ; Yi-Tsen Ku ; Yuh-Shyan Hwang ; Cheng-Chieh Yu
Author_Institution :
Dept. of Electron. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Abstract :
In this paper, a buck converter is designed with a noise-shaping technique to reduce noise and uses synchronous rectification to increase power efficiency. The measured results show the peak noise level less than -84.5dBm at 2MHz and achieve 85% to 93.5% power efficiency with output voltage between 1.8V to 2.5V and a load current range from 50mA to 200mA. The buck converter is fabricated with TSMC 0.35μm CMOS DPQM process. The chip area is 1.417mm*1.239 mm.
Keywords :
CMOS integrated circuits; interference suppression; power convertors; TSMC CMOS DPQM process; current 50 mA to 200 mA; efficiency 85 percent to 93.5 percent; low-noise high-efficient buck converter; noise reduction; noise-shaping technique; power efficiency; size 0.35 mum; synchronous rectification; voltage 1.8 V to 2.5 V; Frequency modulation; Inductors; Noise; Noise shaping; Switches; Voltage control; buck converter; noise-shaping;
Conference_Titel :
VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on
Conference_Location :
Hsinchu
DOI :
10.1109/VLSI-DAT.2015.7114515
