A 0.6V, 1.3GHz dynamic comparator with cross-coupled latches

Author

Bo-Jyun Kuo ; Bo-Wei Chen ; Chia-Ming Tsai

Author_Institution

Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2015

fDate

27-29 April 2015

Firstpage

1

Lastpage

4

Abstract

This paper presents a sub-1V dynamic comparator with cross-coupled latches at multi-GHz operation. The low-voltage cross-coupled latches structure with a separated tail current can be used to optimize the speed and the offset in the latched stage, respectively. A high speed readout circuit is also proposed to further enhance the speed of the comparator. With BER=10⁹, the comparator achieves 143fJ at 3.3GHz and a 0.9V supply, which decreases to only 49fJ at 1.3GHz and a 0.6V supply. Both measured results are based on the input differential voltage of only 4.2mV. The comparator is implemented in 65nm CMOS technology and the chip area of the core circuit occupies 265μm².

Keywords

CMOS integrated circuits; UHF integrated circuits; comparators (circuits); flip-flops; microwave integrated circuits; readout electronics; CMOS technology; dynamic comparator; energy 143 fJ; energy 49 fJ; frequency 1.3 GHz; frequency 3.3 GHz; high speed readout circuit; low-voltage cross-coupled latch structure; multiGHz operation; separated tail current; size 65 nm; voltage 0.6 V; voltage 0.9 V; voltage 4.2 mV; Bit error rate; CMOS integrated circuits; Clocks; Latches; Noise; Semiconductor device measurement; Sensitivity;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on

Conference_Location

Hsinchu

Type

conf

DOI

10.1109/VLSI-DAT.2015.7114523

Filename

7114523