• DocumentCode
    712238
  • Title

    Challenges in implementing high-speed, low-power ADCs in CMOS

  • Author

    Kull, Lukas

  • Author_Institution
    IBM Res. - Zurich, Zurich, Switzerland
  • fYear
    2015
  • fDate
    22-26 March 2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Challenges of CMOS ADC implementations for 100 Gb/s optical communication systems and beyond are highlighted. Limitations and opportunities of architectures and circuits are discussed based on a 56-90 GS/s 8 bit ADC in 32 nm SOI CMOS.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; optical communication; SOI CMOS; bit rate 100 Gbit/s; high-speed low-power ADC; optical communication systems; Bandwidth; CMOS integrated circuits; Clocks; Frequency measurement; Optical fiber communication; Optical switches; Power demand;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Optical Fiber Communications Conference and Exhibition (OFC), 2015
  • Conference_Location
    Los Angeles, CA
  • Type

    conf

  • Filename
    7121575
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=712238