DocumentCode
712862
Title
Demonstration of a HV BCD technology with LV CMOS process
Author
Tsung-Yi Huang ; Chien-Hao Huang ; Chih-Fang Huang ; Ching-Yao Yang ; Yeh, Wang-Chi Vincent ; Huang-Ping Chu ; Chien-Wei Chiu ; Kuo-Hsuan Lo ; Hung-Der Su ; Jing-Meng Liu ; Jeng Gong
Author_Institution
Technol. Dev. Div., Richtek Technol. Corp., Hsinchu, Taiwan
fYear
2015
fDate
10-14 May 2015
Firstpage
193
Lastpage
196
Abstract
Conventional BCD and high voltage technologies are developed with extra masks and additional thermal drive-in process units included in existing LV platforms. The technology development is time-consuming and the turnaround time for the whole process takes longer. In this paper, a low cost solution with a set of layout design methodology is proposed to accomplish the embedded power BCD technology in the existing 5V CMOS process without any additional process steps.
Keywords
CMOS integrated circuits; MOSFET; embedded systems; integrated circuit design; HV BCD technology; LV CMOS process; embedded power BCD technology; layout design methodology; masks; thermal drive-in process units; CMOS integrated circuits; CMOS process; Doping; Implants; Layout; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices & IC's (ISPSD), 2015 IEEE 27th International Symposium on
Conference_Location
Hong Kong
ISSN
1943-653X
Print_ISBN
978-1-4799-6259-4
Type
conf
DOI
10.1109/ISPSD.2015.7123422
Filename
7123422
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