DocumentCode :
719172
Title :
Designing and improving the efficiency of hardware interpolator
Author :
Desai, Dev P.
Author_Institution :
Electron. Eng. Dept., Gujarat Technol. Univ., Ahmedabad, India
fYear :
2015
fDate :
15-16 May 2015
Firstpage :
959
Lastpage :
962
Abstract :
The present paper discusses the design criteria of hardware interpolator for improving its speed of generating overflow pulses. The interpolators are being used widely in many applications, its performance evaluation & improvement becomes very significant. The design criteria discussed in this paper is experimentally verified for efficiency improvement and implemented on the CNC machine tool system.
Keywords :
computerised numerical control; digital differential analysers; machine tools; microcontrollers; network synthesis; CNC machine tool system; design; hardware interpolator; Adders; Computer numerical control; Hardware; Interpolation; Machining; Multiplexing; Registers; Digital Differential Analyzer; Interpolation; Interpolator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing, Communication & Automation (ICCCA), 2015 International Conference on
Conference_Location :
Noida
Print_ISBN :
978-1-4799-8889-1
Type :
conf
DOI :
10.1109/CCAA.2015.7148535
Filename :
7148535
Link To Document :
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