QRS detection algorithm on a novel reconfigurable multiplierless architecture

Author

Jain, Nupur ; Mishra, Biswajit

Author_Institution

VLSI & Embedded Res. Group, Dhirubhai Ambani Inst. of Inf. & Commun. Technol., Gandhinagar, India

fYear

2015

fDate

28-30 May 2015

Firstpage

469

Lastpage

474

Abstract

This paper proposes a novel reconfigurable multiplierless architecture that could be operated as a convolver, FIR filter, adder, multiplier and running average computing unit. The proposed multiplierless architecture uses only shift-and-accumulation resulting in significant saving in the gate-count making it suitable for low power applications as required in wireless sensor networks(WSN), body sensor networks(BSN).

Keywords

FIR filters; adders; low-power electronics; multiplying circuits; reconfigurable architectures; wireless sensor networks; BSN; FIR filter; QRS detection; WSN; adder unit; body sensor networks; gate-count; low power applications; multiplier unit; reconfigurable multiplierless architecture; running average computing unit; shift-and-accumulation; wireless sensor networks; Adders; Clocks; Computer architecture; Delays; Finite impulse response filters; Logic gates; Registers; BSN; FIR; Multiplier-less Reconfigurable Architecture; QRS; WSN;

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial Instrumentation and Control (ICIC), 2015 International Conference on

Conference_Location

Pune

Type

conf

DOI

10.1109/IIC.2015.7150788

Filename

7150788

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=719684