Methods of line end cutting of small CD for 28nm technology

At the 28nm technology node, the space between poly line ends becomes narrower due to the requirements for SRAM transistor density. Unfortunately, smaller space may bring many process issues, such as bridge defects. Line end cut (LEC) technology was introduced to solve such issues. One of LEC challenges is how to obtain smaller space CD while maintaining a sufficient process window. Several methods were studied in this paper. Reducing 6nm space CD can be obtained by tapering the profile through increasing the CHxFy gas flow. However, a trade-off between smaller space CD and etch- stop is required. In addition, high spin on carbon (SOC) bake temperature can enhance the etching performance and contribute to smaller space CD.