The study of 28nm node poly double patterning integrated process

As the development of semiconductor devices, especially for 28 nm technology node and beyond, the shorten effect in line ends of poly gate will be challenging as the size grow smaller, resulting in the overlap of line ends of pattern in mask where Optical Proximity Correction (OPC) is already pushed to the limit. Therefore, the technology of poly line end cut (LEC) process is introduced to cut the long poly pattern for the desired short length, by introducing double patterning lithography. In this paper, we used 193nm immersion lithography for double patterning. A thorough integration scheme was explored and discussed, including film sketches and etching profile to achieve desired CD through double pattering.