Title :
Innovative ultra fine line substrate with bump for semiconductor package
Author :
Shimoishizka, Nozomi ; Nakano, Takahiro ; Hirata, Katsunori
Author_Institution :
Connectec Japan Corp., Niigata, Japan
Abstract :
A new ultra fine line substrate with bumps for semiconductor package has been developed in the present study, making it possible to realize 10um pitch line that has been impossible by conventional method. By making bumps and lines at same time through imprinting method, the technology is more suitable for high pin count flip chip bonding substrate. This paper will describe the detail of this ultra fine line substrate with bumps, the fine line imprint process, design rules, and the simulation results of electrical characteristic in DC and high frequency range.
Keywords :
bonding processes; flip-chip devices; semiconductor device packaging; fine line imprint process; high pin count flip chip bonding substrate; imprinting method; semiconductor package; ultra fine line substrate; Copper; Filling; Graphics; Heating; Propagation losses; Substrates; Wireless communication;
Conference_Titel :
Semiconductor Technology International Conference (CSTIC), 2015 China
Conference_Location :
Shanghai
DOI :
10.1109/CSTIC.2015.7153435
