DocumentCode
720846
Title
Compressive sensing method for production chip test
Author
Bolun Zhang ; Yifan Zhang ; Binbin Li
Author_Institution
Shenzhen Grad. Sch., Peking Univ., Shenzhen, China
fYear
2015
fDate
15-16 March 2015
Firstpage
1
Lastpage
3
Abstract
IC testing is an essential part of semiconductor manufacturing, the silicon chips are deserved to be tested and characterized carefully to get the variation information, however, the traditional testing methods suffer from time consuming, time costing and large area overhead. Compressive Sensing (CS) illustrates that a signal can be perfectly reconstructed from fewer samples than the Nyquist-Shannon sampling theorem requires. CS takes advantage of the signal´s sparseness in some domains, allowing the entire signal to be determined from relatively few measurements. The Linear Dynamical System (LDS) framework is regarded as an important class of parametric models for time-series data. This paper designed an algorithm for the bulk production chip testing based on CS theory. The data to be tested is the numerical variations of chips one by one from the same lot, the purpose of our project is to recover all the data from limited few samples as accurate as possible, and the main idea is to estimate the LDS parameter from compressive measurements.
Keywords
compressed sensing; integrated circuit testing; logic testing; time series; CS theory; IC testing; LDS parameter; compressive measurements; compressive sensing method; linear dynamical system; production chip test; time-series data; Radio access networks; Semiconductor device measurement; Upper bound;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Technology International Conference (CSTIC), 2015 China
Conference_Location
Shanghai
ISSN
2158-2297
Type
conf
DOI
10.1109/CSTIC.2015.7153462
Filename
7153462
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