DocumentCode
720852
Title
Diagnosis driven approach for low yield analysis and identifying root causes for final compensation from wafer foundry
Author
Samuel, Ye ; Jian Wu ; Xiuquan Li ; Liyun Qin ; Kungang Wang ; Shen, Clayton ; Hailing Zhang
Author_Institution
Availink Inc., Beijing, China
fYear
2015
fDate
15-16 March 2015
Firstpage
1
Lastpage
3
Abstract
With diagnosis tools´ help, people analyze the yield problem and identify the process issues and finally improve production yield rate. Nowadays, this approach is often employed during products initial ramping up stage in foundry and large chip design house. It is not often to see that people apply diagnosis-driven analysis for matured products, capture the root causes, especially after wafer foundry confirmed their process control within target. We would like to introduce a case study for matured SoC product low yield analysis. With scan diagnosis and layout aware diagnosis, we apply all possible analysis and identify FA candidates for PFA (physical failure analysis), then capture process issues, and then finally enhance the yield with foundry process control. As a result for evidence captured, wafer foundry gives the compensation for the yield loss due to process control leak.
Keywords
crystal defects; integrated circuit testing; integrated circuit yield; logic testing; system-on-chip; diagnosis-driven analysis; foundry process control; layout aware diagnosis; low yield analysis; matured SoC product; physical failure analysis; scan diagnosis; wafer foundry; yield loss; Automatic optical inspection; Barium; Europe; Foundries; Integrated optics; Market research; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Technology International Conference (CSTIC), 2015 China
Conference_Location
Shanghai
ISSN
2158-2297
Type
conf
DOI
10.1109/CSTIC.2015.7153468
Filename
7153468
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