• DocumentCode
    723218
  • Title

    Fabricating polymer insulation layer by spin-coating for through silicon vias

  • Author

    Guoping Zhang ; Kun Jiang ; Qiang Liu ; Jinhui Li ; Rong Sun ; Lee, S. W. Ricky ; Wong, C.P.

  • Author_Institution
    Shenzhen Inst. of Adv. Technol., Shenzhen, China
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    1973
  • Lastpage
    1979
  • Abstract
    This paper reports a fabrication process for the deposition of a polymer insulation layer on the sidewall of through silicon vias in wafer level packaging. The novolac resin based glue was used as precursor to prepare the insulation layer. The glue is a Newtonian fluid and has low viscosity (24 mPa*s @ 100 l/s) as well as low contact angle (25.9°) to silicon. The resultant polymer insulation layer has a shearing strength as high as 25.8 Kg/mm2. Furthermore, the polymer insulation layer exhibits good uniformity in thickness and roughness over the whole 8" wafer. On the conformal coating of the polymer insulation layer, the Ti/Cu seed layer and Cu conductive layer were fabricated by PVD and electroplating. Therefore, all the results show that the polymer materials could be a reliable and economical solution for the TSV insulator in the view of wafer level packaging.
  • Keywords
    adhesives; insulating coatings; polymers; resins; spin coating; three-dimensional integrated circuits; wafer level packaging; Ti-Cu; conformal coating; novolac resin based glue; polymer insulation layer fabrication; shearing strength; spin coating technique; through silicon via; wafer level packaging; Coatings; Insulation; Polymers; Resins; Silicon; Viscosity; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
  • Conference_Location
    San Diego, CA
  • Type

    conf

  • DOI
    10.1109/ECTC.2015.7159872
  • Filename
    7159872