Eliminating arsenic containing residue that create killer defects in 20 nm HVM

Dry oxide removal techniques are used as pre-spacer cleans to remove sidewall oxide (without undercutting the gate oxide and maintaining the gate CD (critical dimension)) in 20 nm HVM (high volume manufacturing). This results in arsenic containing residues on the wafer surface. Dry etch, although effective in accomplishing most of the desired process objectives, is not effective in removing arsenic, implanted into the oxide during the junction formation. As a result, arsenic residues are left on the wafer surface after the pre-spacer clean which then get coated by spacer nitride. Nitride-coated arsenic residues are difficult to remove and new cleans were developed to completely remove arsenic residue from the wafer surface at the pre-Spacer clean step. Defectivity reduction and electrical data are presented to show the effectiveness of these new cleans and the resultant yield increase, respectively.