Productivity challenges in PVD processing in 300mm pilot lines for power semiconductors

PVD process technologies have been optimized to produce power semiconductor devices on a 300mm wafer in a pilot line being established at Infineon Technologies. The challenges in scaling up the processes from conventional wafer sizes 150-200 mm to 300 mm have been discussed. For front side Aluminum depositions the DC magnetron sputtering profile was modified to achieve contact fill across the wafer, high deposition rates and enhanced target life. For backside metallization on thin wafers, a high throughput process flow has been developed to achieve Ohmic contact between Si wafer and Aluminum layer and control the wafer bow for subsequent metal stack depositions.