Title :
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors
Author :
Illade-Quinteiro, J. ; Brea, V.M. ; Lopez, P. ; Cabello, D.
Author_Institution :
Centro de Investig. en Tecnoloxias da Informacion (CITIUS), Univ. of Santiago de Compostela, Santiago de Compostela, Spain
Abstract :
This paper studies the dark current (DC) of the photodiode (PD), the transmission gate (TG), and the floating diffusion (FD) in 4-Transistor (4T) pixels in standard CMOS technologies for Time-of-Flight (ToF) sensors through device simulations. The paper addresses the layout optimization in terms of DC for an nwell/psub and two custom pinned-photodiodes (PPD), stating their pros and cons.
Keywords :
CMOS integrated circuits; optimisation; photodiodes; 4-transistor pixel topology; dark current optimization; floating diffusion; nwell-psub pinned-photodiodes; standard CMOS technology; time-of-flight sensors; transmission gate; two custom pinned-photodiodes; Anodes; CMOS integrated circuits; CMOS technology; Imaging; Photodiodes; Standards;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7168643
