DocumentCode
727125
Title
Multi-frequency resonant clocks
Author
LaCara, Benjamin M. ; Ping-Yao Lin ; Guthaus, Matthew R.
Author_Institution
Dept. of Comput. Eng., Univ. of California, Santa Cruz, Santa Cruz, CA, USA
fYear
2015
fDate
24-27 May 2015
Firstpage
1402
Lastpage
1405
Abstract
Clock distribution networks consume a significant portion of total chip power in high-performance designs. Resonant clocks are one proposed method to lower this power in modern designs as well as a fewer required clock buffers. Recent resonant solutions are limited to optimal performance at one particular frequency which is problematic since dynamic frequency scaling is often used to lower overall system power. This paper introduces the first scheme to produce a clock distribution network with a tunable resonant frequency. Experimental results show the resonant frequency ranges from 1.2GHz to 2.6GHz while saving up to 41% of the power on the clock distribution network when compared to the non-resonant distribution.
Keywords
clock distribution networks; integrated circuit design; microprocessor chips; oscillators; clock distribution networks; dynamic frequency scaling; frequency 1.2 GHz to 2.6 GHz; multi-frequency resonant clocks; tunable resonant frequency; Benchmark testing; Capacitors; Clocks; Inductors; Integrated circuit modeling; RLC circuits; Resonant frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location
Lisbon
Type
conf
DOI
10.1109/ISCAS.2015.7168905
Filename
7168905
Link To Document