DocumentCode
727175
Title
An FPGA platform for generation of stimulus triggering based on intracortical spike activity in brain-machine-body interface (BMBI) applications
Author
Shahdoost, Shahab ; Mohseni, Pedram
Author_Institution
Electr. Eng. & Comput. Sci. Dept., Case Western Reserve Univ., Cleveland, OH, USA
fYear
2015
fDate
24-27 May 2015
Firstpage
1766
Lastpage
1769
Abstract
Brain-machine-body interfaces (BMBIs) aim to create an artificial connection in the nervous system by converting neural activity recorded from one cortical region to electrical stimuli delivered to another cortical region, spinal cord, or muscles in real time. In particular, conditioning-mode BMBIs utilize such activity-dependent stimulation strategies to alter the strength of synaptic efficacy between remote regions of the nervous system and promote functional recovery after injury by exploiting mechanisms underlying neuroplasticity. This paper presents a reconfigurable, field-programmable gate array (FPGA)-based platform that incorporates digital spike discrimination based on user-set thresholding and time-amplitude windowing, as well as decision-making circuitry to generate multichannel stimulation triggers derived from intracortical neural spike activity. The algorithm has been synthesized on a Cyclone II FPGA using Altera´s Quartus II design software and validated with prerecorded intracortical neural spike activity from an anesthetized laboratory rat.
Keywords
brain-computer interfaces; field programmable gate arrays; neural chips; Altera Quartus II design software; BMBI applications; Cyclone II FPGA; FPGA platform; activity-dependent stimulation strategies; anesthetized laboratory rat; artificial connection; brain-machine-body interface; conditioning-mode BMBI; cortical region; decision-making circuitry; digital spike discrimination; electrical stimuli; field-programmable gate array; functional recovery; injury; intracortical neural spike activity; multichannel stimulation triggers; muscles; nervous system; neural activity; neuroplasticity; reconfigurable FPGA; spinal cord; stimulus triggering; synaptic efficacy; time-amplitude windowing; user-set thresholding; Clocks; Decision making; Delays; Field programmable gate arrays; Nervous system; Real-time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location
Lisbon
Type
conf
DOI
10.1109/ISCAS.2015.7168996
Filename
7168996
Link To Document