Comparative review of NoCs in the context of ASICs and FPGAs

Network-on-Chip (NoC) is an emerging solution for interconnect problems for both ASICs and FPGAs nowadays. In this paper, we deliver a comparative review between ASIC-based and FPGA-based NoCs. An exploration of design tradeoffs for different NoC design parameters is also given. We also propose an evaluation methodology and design recommendations for various design parameters for both ASIC and FPGA oriented NoCs. These design recommendations help in selecting the optimum design parameters according to the requirements of the application used.