Title :
A wide-range dual-modulus prescaler using a novel SCL biasing technique
Author :
Azcona, C. ; Calvo, B. ; Medrano, N. ; Celma, S. ; Gimeno, C.
Author_Institution :
Group of Electron. Design - I3A, Univ. of Zaragoza, Zaragoza, Spain
Abstract :
This paper presents a simple but effective improvement for source coupled logic (SCL) circuits and its application to dual modulus frequency prescaler design. By biasing the standard resistor-load SCL structure with a bias current inversely proportional to the resistor, logic levels are kept over process and temperature variations and, as a result, reliable operation is preserved over a wider range. This technique has been tested in a 1.8 V-0.18 μm CMOS front-end 8/9 prescaler, showing its feasibility for the target 1.35-2.7 GHz input range over all corners and a commercial temperature range of (0, +85 oC).
Keywords :
CMOS logic circuits; UHF integrated circuits; integrated circuit reliability; prescalers; CMOS front-end prescaler; SCL biasing technique; SCL circuit reliability; frequency 1.35 GHz to 2.7 GHz; frequency prescaler; resistor-load SCL structure; size 0.18 mum; source coupled logic circuits; temperature 0 degC; temperature 85 degC; voltage 1.8 V; wide-range dual-modulus prescaler; CMOS integrated circuits; Frequency conversion; Frequency synthesizers; Logic gates; Resistors; Standards; Voltage control; Biasing Technique; Dual Modulus Prescaler; Process Immunity; Source Coupled Logic; Wide Frequency Range;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7169124
