DocumentCode :
727273
Title :
A 64dB gain 60GHz receiver with 7.1dB noise figure for 802.11ad applications in 90nm CMOS
Author :
Luo, Jun ; Zhang, Lei ; Zhu, Wei ; Zhang, Li ; Wang, Yan ; Yu, Zhiping
Author_Institution :
Institute of Microelectronics, Tsinghua University, Beijing 100084, China
fYear :
2015
fDate :
24-27 May 2015
Firstpage :
2401
Lastpage :
2404
Abstract :
A 60GHz receiver for 802.11ad application with superior performance in 90nm CMOS process, compared with prior arts in advanced processes, is proposed and realized. A 3-stage differential LNA achieves a gain of 19.8dB and a noise figure of 6dB in measurement, showing less than 0.3dB difference from simulation due to the elaborate consideration of parasitics. A baseband PGA with wideband and large gain tuning range is achieved from modified Cherry-Hooper amplifier with negative capacitive neutralization technique. The entire receiver achieves a double-side-band NF of 7.1dB and a maximal conversion gain of 64dB with 28dB tuning range, while consuming only 177mW of power. The measured output P1dB is −5.5dBm. All measured results are rigorously loyal to the simulation.
Keywords :
CMOS integrated circuits; Electronics packaging; Gain; Mixers; Noise figure; Receivers; 60GHz; LNA; PGA; Receiver; Super-heterodyne;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon, Portugal
Type :
conf
DOI :
10.1109/ISCAS.2015.7169168
Filename :
7169168
Link To Document :
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