A novel yield aware multi-objective analog circuit optimization tool

This paper proposes a novel multi-objective yield aware analog sizing tool that utilizes scrambled Quasi Monte Carlo (QMC) approach for efficient yield estimation and Strength Pareto Evolutionary Algorithm-2 (SPEA2) as a search engine. Analog circuit sizing tools have been utilized for the last two decades to overcome challenging trade-offs in analog circuit design. However, due to the variation phenomenon, some solutions at the Pareto front (PF) move towards the suboptimal region. To overcome this issue, yield aware optimization tools, where yield is given as a new design objective, have been proposed in the last decade. Conventionally, Monte Carlo (MC) approach has been used for the yield estimation. However, large sized MC analysis is a highly inefficient and time consuming process because of the numerous simulations performed during the optimization process. Rather than conventional MC, using QMC, which utilizes Low Discrepancy Sequences (LDS), enhances the synthesis time since, it promises low estimation errors with fewer number of simulations. Thanks to the QMC based variability analysis and multi-objective search engine, a yield aware PF that allows the designer to access all robust solutions can be obtained within an acceptable synthesis time.