Experimental design of high performance non volatile main memory swapping using DRAM

The mobile devices such as smartphones and tablets are increasing processor speed and they are desired more energy. We focus on the emerging non volatile memory (NVM), which has gained attention in recent years. A non volatile memory is new memory technology such as SST-MRAM, PCM and ReRAM. Any devices also can be accessed in byte units, high speed nanoseconds access latency and higher write endurance than the flash memory. Thus, it is possible to replace the DRAM of the main memory by the NVM, it is possible to achieve reducing the power consumption. Although potentially possible of large capacity, NVM product of capacity greater than DRAM is currently not appeared now. We should provide a large memory space without performance degradation by in combination with NVM and other memory devices. In this paper, we propose a method to use the DRAM as swap space. The proposed method provides an experimental design of the non volatile main memory system. It enables both of high-performance and energy efficiency.